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| Quantity | Price (Incl GST) |
|---|---|
| 1+ | $0.833 ($0.9163) |
| 10+ | $0.498 ($0.5478) |
| 100+ | $0.449 ($0.4939) |
| 500+ | $0.447 ($0.4917) |
| 1000+ | $0.445 ($0.4895) |
| 2500+ | $0.397 ($0.4367) |
| 5000+ | $0.394 ($0.4334) |
Product Information
Product Overview
The MC14043BDG is a quad R-S Latch constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three-state buffers having a common enable input. The outputs are enabled with a logical 1 or high on the enable input, a logical 0 or low disconnects the latch from the Q outputs, resulting in an open circuit at the Q outputs. The outputs are capable of driving two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range. This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
- Double diode input protection
- Three-state outputs with common enable
Applications
Industrial
Warnings
Precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit.
Technical Specifications
MC14043
Tri State
8.8mA
SOIC
3V
4bit
4043
125°C
-
No SVHC (25-Jun-2025)
SR
175ns
SOIC
16Pins
18V
MC140
-55°C
-
-
Technical Docs (3)
Alternatives for MC14043BDG
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Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:China
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate