CY27410FLTXI

CY27410FLTXI is a standard-performance programmable clock generator with four independent fractional PLLs, which generates any frequency with a zero-ppm synthesis error. Each PLL is followed by a set of four independent dividers to generate four different frequencies from a single PLL. All four dividers are synchronized to generate phase-aligned clock outputs with minimal skew. The PLLs also support the spread-spectrum feature to reduce EMI. PLL 1 has VCXO functionality to achieve ppm granularity of output frequency. The CY27410 accepts a crystal clock or a single-ended/differential reference clock. The device supports up to 12 outputs, divided into two banks with six outputs each. Four outputs of PLL 1 and PLL 2 are multiplexed to output Bank 1, and four clock outputs of PLL 3 and PLL 4 are multiplexed to output Bank 2. The 12 outputs of the two banks are configurable as eight differential outputs, 12 single-ended outputs, or a combination of differential and single-ended outputs.

• Crystal input: 8 to 48 MHz, reference clock: 8 to 250MHz LVCMOS, 8 to 700MHz differential
• 25 to 700MHz LVDS, LVPECL, HCSL, CML, 3 to 250MHz LVCMOS, 1 to 8MHz for one LVCMOS output
• RMS phase jitter: 1-ps max at 12-KHz to 20-MHz offset
• PCIe 1.0/2.0/3.0 compliant, SATA 2.0, USB 2.0/3.0, 1/10-GbE compliant
• Four fractional N-type phase-locked loops (PLLs) with VCXO, spread-spectrum capability
• Zero-delay buffer (ZDB) and non-zero delay buffer (NZDB) configurations
• I2C configurable with onboard programming
• Industrial-grade device, offered in 48-pin QFN (7 × 7 × 1.0mm) package