| Quantity | Price (Incl GST) |
|---|---|
| 1+ | $6.620 ($7.282) |
| 10+ | $5.980 ($6.578) |
| 25+ | $5.790 ($6.369) |
| 50+ | $5.620 ($6.182) |
| 100+ | $5.400 ($5.940) |
| 250+ | $5.220 ($5.742) |
| 500+ | $5.070 ($5.577) |
Product Information
Product Overview
The DS90CF384MTDX/NOPB is a FPD-link Receiver converts the LVDS data streams back into 28 bits of CMOS/TTL data. At a transmit clock frequency of 65MHz, 24 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455Mbps per LVDS data channel. Using a 65MHz clock, the data throughputs is 227Mbps. The transmitter is offered with programmable edge data strobes for convenient interface with a variety of graphics controllers. The transmitter can be programmed for rising edge strobe or falling edge strobe through a dedicated pin. A rising edge transmitter will inter-operate with a falling edge receiver (DS90CF384) without any translation logic.
- Power-down mode (<lt/>0.5mW total)
- Single pixel per clock XGA (1024x768) ready
- Supports VGA, SVGA, XGA and higher addressability
- Up to 1.8Gbps throughput
- Narrow bus reduces cable size
- PLL requires no external components
- Falling edge data strobe receiver
- Compatible with TIA/EIA-644 LVDS standard
- 290mV Swing LVDS devices for low EMI
- 20 to 65MHz Shift clock support
- <lt/>250mW (typical) Chipset (Tx + Rx) power consumption
- <gt/>7kV ESD rating
Applications
Industrial
Technical Specifications
LVDS Receiver
85°C
3.6V
56Pins
LVCMOS, LVTTL
-
MSL 2 - 1 year
-40°C
3V
TSSOP
LVDS
28bit
-
No SVHC (27-Jun-2018)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:Malaysia
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate